Frequency multiplier circuits provide an output signal whose frequency is a multiple of that of an input signal. For example, in an analog frequency multiplier, an input signal is applied to a nonlinear device that produces at its output a plurality of signals in a frequency spectrum whose components are integer multiples of the frequency of the input signal. A filter of predetermined center frequency and bandwidth is positioned at the output of the nonlinear device to select the signal component of the desired frequency.
Phase locked loop circuitry is frequently used in frequency multiplication of an input signal whose frequency is time varying. Conventional phase locked loops employ analog, digital, or a hybrid of analog and digital circuitry in a feedback arrangement. The phase locked loop develops an error signal by mixing a reference signal and the output signal of a voltage controlled oscillator and uses feedback of the error signal to control the frequency of the output signal of the voltage controlled oscillator.
Phase locked loops can be configured to change the frequency of an output signal in selectable frequency steps of other than integer multiples of the frequency of the reference signal. The disadvantage of using a phase locked loop is that there can exist a substantial delay in the response of the output signal to a change in the frequency of the reference signal. In many instances, this delay is dictated by circuit parameters selected to stabilize the loop. Under such conditions, the phase locked loop does not have the ability to track and respond rapidly to changes in frequency of the input signal.